Refereed Journal Publications:

1. Etem Deniz, Alper Sen, and Jim Holt, Verification and Coverage of Message Passing Multicore Applications, ACM Transactions on Design Automation of Electronic Systems, 2012 (accepted for publication). PDF
2. Alper Sen, Concurrency-Oriented Verification and Coverage of System Level Designs, ACM Transactions on Design Automation of Electronic Systems, 16(4), 37:1-37:25, 2011. PDF
3. Alper Sen, Baris Aksanli, and Murat Bozkurt, Speeding-up Cycle Based Logic Simulation using Graphics Processing Units , International Journal of Parallel Programming, 39(5), 639-661, DOI: 10.1007/s10766-011-0164-7, 2011. PDF
4. Scott Little, David Walter, Kevin Jones, Chris J. Myers, and Alper Sen, Analog/Mixed-Signal Circuit Verification Using Models Generated from Simulation Traces, In International Journal of Foundations of Computer Science (IJFCS), 2010. PDF
5. Neeraj Mittal, Alper Sen and Vijay K. Garg, Solving Computation Slicing using Predicate Detection, In IEEE Transactions on Parallel and Distributed Systems, December 2007. PDF
6. Alper Sen and Vijay K. Garg, Formal Verification of Simulation Traces Using Computation Slicing, In IEEE Transactions on Computers, April 2007. PDF

Edited Books, Journals and Proceedings:

1. C. Ozturan and A. Sen, Proceedings of the Ninth International Symposium on Parallel and Distributed Computing (ISPDC), IEEE Computer Society, 2010.

2. A. Sen and C. Ozturan, Guest Editorial: Special Issue on the Ninth International Symposium on Parallel and Distributed Computing (ISPDC), Scientific Programming Journal, 19(1), DOI:10.3233/SPR- 2011-0314, 2011.

Patents:

• M. S. Abadir, H. Anand, A. Sen, J. Bhadra, Model Correspondence Method and Device, United States Patent and Trademark Office (USPTO), US 7650579.

Refereed Conference and Workshop Publications:

1. Alper Sen, Baris Aksanli, Murat Bozkurt, and Melih Mert, Parallel Cycle Based Logic Simulation using Graphics Processing Units , International Symposium on Parallel and Distributed Computing (ISPDC), 2010. PDF
2. Alper Sen and Magdy S. Abadir, Coverage Metrics for Verification of Concurrent SystemC Designs Using Mutation Testing, IEEE International High Level Design Validation and Test Workshop (HLDVT), June 2010. PDF
3. Dogan Fennibay, Arda Yurdakul, and Alper Sen, Introducing Hardware-in-Loop Concept to the Hardware/Software Co-design of Real-time Embedded Systems, IEEE International Conference on Embedded Software and Systems (ICESS), June 2010. PDF
4. Alper Sen, Mutation Operators for Concurrent SystemC Designs, IEEE Microprocessor Test and Verification Workshop, Dec. 2009. PDF
5. Alper Sen, Vinit Ogale, and Magdy S. Abadir, Predictive Runtime Verification of Multi-Processor SoCs in SystemC, Design Automation Conference (DAC), June 2008. PDF
6. Scott Little, Alper Sen, and Chris Myers, Application of Automated Model Generation Techniques to Analog Mixed Signal Circuits, In IEEE Microprocessor Test and Verification Workshop, December 2007. PDF
7. Selma Ikiz and Alper Sen, Runtime Verification of k-Mutual Exclusion for SoC's, In IEEE Microprocessor Test and Verification Workshop, December 2007. PDF
8. Alper Sen, Error Diagnosis in Equivalence Checking of High Performance Microprocessors, Workshop on Verification and Debugging (V&D), August 2006. PDF
9. Vijay K. Garg, Neeraj Mittal, and Alper Sen, Using Order in Distributed Computing, American Mathematical Society (AMS) National Meeting invited, January 2006. PDF
10. Himyanshu Anand, Jayanta Bhadra, Alper Sen, Magdy S. Abadir, and Ken G. Davis, Establishing Latch Correspondence for Embedded Circuits of PowerPC Microprocessors, IEEE International High Level Design Validation and Test Workshop (HLDVT), December 2005. PDF
11. Alper Sen, Jayanta Bhadra, Vijay K. Garg, and Jacob A. Abraham, Formal Verification of a System-on-Chip Using Computation Slicing, International Test Conference (ITC), October 2004. PDF
12. Neeraj Mittal, Alper Sen, Vijay K. Garg, and Ranganath Atreya, Finding Satisfying Global States: All for One and One for All, In Proceedings of International Parallel and Distributed Processing Symposium (IPDPS), April 2004. PDF
13. Alper Sen and Vijay K. Garg, Detecting Temporal Logic Predicates in Distributed Programs Using Computation Slicing, In Proceedings of the Seventh International Conference on Principles of Distributed Systems (OPODIS), December 2003. PDF
14. Alper Sen and Vijay K. Garg, On Checking Whether a Predicate Definitely Holds, In Proceedings of the Third International Workshop on Formal Approaches to Testing of Software (FATES), October 2003. PDF
15. Vijay K. Garg, Neeraj Mittal, and Alper Sen, Applications of Lattice Theory to Distributed Computing, In ACM Special Interest Group on Algorithms and Computation Theory (SIGACT) News, September 2003. PDF
16. Alper Sen and Vijay K. Garg, Partial Order Trace Analyzer (POTA) for Distributed Programs, In Proceedings of the Third International Workshop on Runtime Verification (RV), July 2003. PDF
17. Alper Sen and Vijay K. Garg, Detecting Temporal Logic Predicates on the Happened-Before Model, In Proceedings of International Parallel and Distributed Processing Symposium (IPDPS), April 2002. PDF

Dissertation and Thesis:

• Alper Sen, Techniques for Formal Verification of Concurrent and Distributed Program Traces, Ph.D. Dissertation, The University of Texas at Austin, May 2004. PDF
• Alper Sen, Verification of SDL Systems with Partial Order Methods, Master's Thesis, Middle East Technical University, Ankara, May 1997. PDF