Opportunities
Research Opportunities
I am looking for motivated senior undergraduates, MS, and PhD students to work on projects some of which are listed below. Funding is available.My research is on analysis and design of concurrent and parallel systems. In design area, we are interested in improving performance of various algorithms through parallelization. In analysis area, we are interested in verification of concurrent systems. Verification consumes 60-70% of the overall software or hardware design cycle, hence it is a very costly process. The verification problem is growing with the introduction of multi-threaded, concurrent software and multiple processor systems. Software, hardware, telecommunication, semiconductor companies such as Microsoft, Google, Intel, Freescale, IBM, ST Micro, Siemens are all interested in verification solutions. Our goal is to develop efficient and industrial scale solutions to the verification problem.
RELIABLE EMBEDDED SYSTEMS USING MULTICORE AND MESSAGE PASSING ARCHITECTURES
Annoucenment for new SRC Project.Using Graphic Processing Units for General Purpose Algorithm Parallelization
Multicore programming has been a reality with the emergence of recent hardware from companies such as Intel, AMD, Freescale, NVIDIA. In particular, graphical processing units (GPU) are equipped with hundreds of small cores enabling to execute 10,000 threads concurrently. New languages and standards such as OpenCL, CUDA, OpenMP are emerging as common platforms for multicore programming. The goal of this project is to port algorithms such as simulation/testing algorithms into NVIDIA GPUs and obtain big performance gains.Verification of Parallel, Multithreaded Systems
In this project, the goal is to develop analysis techniques to increase reliability of concurrent systems. These systems include both hardware and software systems. In particular, we propose to enhance and further develop our predictive verification techniques to find both actual and potential bugs in a program. These bugs include deadlocks and race conditions. Automated tools will be implemented to validate the effectiveness of the approach. System level programming languages such as SystemC will be used.Mutation Analysis to Increase Verification Coverage
Mutation analysis is a popular technique in software testing that allows to increase coverage of tests. Recently a similar approach has been taken for hardware. Given a design/code and its tests/testbenches, in this project, the goal is first to define a set of mutations for a given language. The choices are SystemC or Message Passing Interface (MPI) and application to the new emerging standards such as Multicore Assocation APIs or OpenCL. Second, to build an automated environment that inserts these mutations in the code. Third, to execute/simulate code and observe whether the given set of tests can detect these mutations at the outputs of the design. This work enables us to increase quality of verification tests.Tool Development: User Interfaces for Software Testing Environments
- We are developing software testing environment using mutation testing. The goal is to develop a GUI for this environment.- We previously developed a tool called Partial Order Trace Analyzer (POTA) for verification of Java programs. In this project, the goal is to develop a modular code base allowing to plug in new verification algorithms and developing scripts and a GUI frontend.
