Arda Yurdakul

Publications (International)

M. Tükel, A. Yurdakul and B. Örs, “Customizable embedded processor array for multimedia applications”, Integration-The VLSI Journal, Doi: 10.1016/j.vlsi.2017.09.009, available online.

M. Tükel, A. Yurdakul and B. Örs, “A Novel Template-based Multimedia Processor Array and Its Toolset,” 10th International Conference on Electrical and Electronics Engineering (ELECO’17), Nov 30 - Dec 02, 2017, Bursa, Turkey

K. R. Özyılmaz and A. Yurdakul, “Integrating Low-Power IoT devices to a Blockchain-Based Infrastructure,” International Conference on Embedded Software (EMSOFT’17), Oct. 15-20, 2017, Seoul, South Korea.

A. Yurdakul, “From SQL to Database Processors: A Retargetable Query Planner,” Forum on Specification & Design Languages (FDL’17), Sept 18-20, 2017, Verona, Italy.

B. Salami, G. A. Malazgirt, O. Arcas-Abella, A. Yurdakul and N. Sönmez, “AxleDB: A novel programmable query processing platform on FPGA,” Microprocessors and Microsystems: Embedded Hardware Design, vol. 51, pp. 142-164, June 2017. Doi: 10.1016/j.micpro.2017.04.018

G. A. Malazgirt and A. Yurdakul, “Prenaut: Design space exploration for embedded symmetric multiprocessing with various on-chip architectures,” Journal of Systems Architecture: Embedded Software Design, vol. 72, pp. 3-18, January 2017. Doi:10.1016/j.sysarc.2016.07.004

M. Schmid, C. Schmitt, F. Hannig, G. A. Malazgirt, N. Sonmez, A. Yurdakul and A. Cristal, “Big Data and HPC Acceleration with Vivado HLS,” in FPGAs for Software Engineers, 2016, Springer, ISBN: 978-3-319-26406-6

S. Bayar and A. Yurdakul, “An Efficient Mapping Algorithm on 2-D Mesh Network-on-Chip with Reconfigurable Switches,” 11th International Conference on Design &Technology of Integrated Systems in Nanoscale Era (DTIS’16), April 12-14, 2016, İstanbul, Turkey. DOI: 10.1109/DTIS.2016.7483808

N. Aras and A. Yurdakul, “A New Multi-objective Mathematical Model for the High-level Synthesis of Integrated Circuits,” Applied Mathematical Modelling, Volume 40, Issue 3, pp. 2274-2290, 1 February 2016.

G. A. Malazgirt, D. Candaş and A. Yurdakul, “Taxim: A Toolchain for Automated and Configurable Simulation for Embedded Multiprocessor Design,” 4th International Workshop on High Performance Energy Efficient Embedded Systems (HIP3ES’16), Jan 18, 2016, Prag,  Czech Republic.

G. A. Malazgirt, A. Yurdakul and S. Niar, “Customizing VLIW Processors from Dynamically Profiled Execution Traces”, Microprocessors and Microsystems: Embedded Hardware Design, vol. 39, no. 8, pp. 656–673, November 2015.

S. Bayar and A. Yurdakul, “PFMAP: Exploitation of Particle Filters for Network-on-chip Mapping,” IEEE Transactions on VLSI Design, vol. 23, no. 10, pp. 2116 - 2127, October 2015.

G. A. Malazgirt, B. Kıyan, D. Candaş, K. Erdayandı and A. Yurdakul, “Exploring Embedded Symmetric Multiprocessing with Various On-chip Architectures,” 13th International Conference on Embedded and Ubiquitous Computing (EUC’15), October 21-23, 2015, Porto, Portugal.

G. A. Malazgirt, N. Sönmez, A. Yurdakul, O. Unsal and A. Cristal, “High Level Synthesis Based Hardware Accelator Design for Processing SQL Queries,” 12th FPGA World Conference (FPGAWORLD’15), September 8-10, 2015, Stockholm-Copenhag, Sweden-Denmark.

G. A. Malazgirt, N. Sönmez, A. Yurdakul, O. Unsal and A. Cristal, “Accelerating Complete Decision Support Queries Through High-Level Synthesis Technology23rd ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA’15), February 22-25, 2015, Monterey, California, USA

S. Niar, A. Yurdakul, O. Unsal, T. Tugcu and A. Yuceturk, “A Dynamically Reconfigurable Architecture for Emergency and Disaster Management in ITS3rd International Conference on Connected Vehicles and Expo, Nov 3-7, 2014, Vienna, Austria.

G. A. Malazgirt, H.E. Yantir, A. Yurdakul and S. Niar, "Application Specific Multi-port Memory Customization in FPGAs," 24th International Conference on Field Programmable Logic and Applications (FPL'14), September 2 - 4, 2014, Munich, Germany.

G. A. Malazgirt, A. Yurdakul and S. Niar, “MIPT: Rapid Exploration and Evaluation for Migrating Sequential Algorithms to Multiprocessing12th International Conference on High Performance Computing & Simulation (HPCS’14), July 21 - 25, 2014, Bologna, Italy.

H. E. Yantir and A. Yurdakul, "An Efficient Heterogeneous Register File Implementation for FPGAs," IEEE 21st Reconfigurable Architectures Workshop (RAW’14),  19-20 May 2014, Phoenix, USA.

H. E. Yantir, S. Bayar and A. Yurdakul, “Efficient Implementations of Multi-pumped Multi-port Register Files in FPGAs”, 16th EUROMICRO Conference on Digital System Design (DSD’13), September 4–6, 2013, Santander, Spain.

D. Fennibay, A. Yurdakul and A. Şen, “Introducing A Heterogeneous Simulation and Modeling Framework for Automation Systems”, IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems, vol. 31, pp 1642-1655, November 2012.

G. A. Malazgirt, E. Culha, A. Sen, I. F. Baskaya and A. Yurdakul, “A Verifiable High Level Data Path Synthesis Framework”, 15th EUROMICRO Conference on Digital System Design (DSD’12), September 5–8, 2012, Izmir, Turkey.

S. Bayar and A. Yurdakul, “A Dynamically Reconfigurable Communication Architecture For Multicore Embedded SystemsJournal of Systems Architecture, vol. 58, pp. 140-159, February 2012.

S. Bayar, M. Tükel and A. Yurdakul, "A Self-Reconfigurable Platform for General Purpose Image Processing Systems on Low-Cost Spartan-6 FPGAs, " 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoc’11), June 20-22, 2011, Montpellier, France.

A. Yurdakul, B. Kurumahmut, G Kabukcu, “Generic Model for Application-Specific Processors on Reconfigurable Fabric,” in Advances in Design Methods from Modeling Languages for Embedded Systems and SoC’s, Vol. 63, August 2010.

D. Fennibay, A. Yurdakul and A. Şen, “Introducing Hardware-in-Loop Concept to the Hardware/Software Co-design of Real-time Embedded Systems”, Proceedings of the 7th IEEE International Conference on Embedded Software and Systems (ICESS’10), June 29-July 1, 2010, Bradford, United Kingdom.

D. Fennibay, A. Yurdakul and A. Şen, “Hardware-in-the-loop for hardware/software co-design of real-time embedded systemsDATE’10 Workshop: Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications, March 8-12, 2010, Frankfurt, Germany.

R. Ghamari and A. Yurdakul, “Register File Design in Automatically Generated ASIPs,” 4th HiPEAC Workshop on Reconfigurable Computing (WRC’10), Jan 23, 2010, Pisa, Italy.

B. Kurumahmut, G. Kabukcu, R. Ghamari and A. Yurdakul, "Design Automation Model for Application-Specific Processors on Reconfigurable Fabric,Proceedings of Forum on Specification & Design Languages (FDL’09) , Sept. 22-24, 2009, Sophia Antipolis, France.

M. Erkoç and A. Yurdakul, "Halftoning Soft Cores for Low-Cost Digital Displays,Proceedings of 24th International SympoSİUm on Computer and Information Sciences (ISCIS'09), Sept. 14-16, 2009, Northern Cyprus.

M. Aktan, A. Yurdakul and G. Dündar, “An Algorithm for the Design of Low-Power Hardware Efficient FIR Filters,” IEEE Transactions on Circuits and Systems-I, vol. 55, no. 6, pp. 1536-1545, July 2008.

S. Bayar and A. Yurdakul, "Self-Reconfiguration on Spartan-III FPGAs with Compressed Partial Bitstreams via a Parallel Configuration Access Port (cPCAP) Core," Proceedings of 4th conference on Ph.D. Research in Microelectronics and Electronics (PRIME'08), İstanbul, Turkey, 2008.

S. Bayar and A. Yurdakul, "Dynamic Partial Self-Reconfiguration on Spartan-III FPGAs via a Parallel Configuration Access Port (PCAP)," Proceedings of 2nd HiPEAC Workshop on Reconfigurable Computing, Goteborg, Sweden, 2008.

G. Kabukcu and A. Yurdakul, “Low-Cost Solution to On-Line CFA DemosaickingInternational Journal of Imaging Systems and Technology, vol. 17, no. 4, pp. 232-243, December 2007.

N. Sönmez and A. Yurdakul, “SIxD: A Configurable Application-Specific SISD/SIMD Soft-Core”, Proceedings of SoC2006, Tampere, Finland, 2006.

A. Yurdakul, “Multiplierless Implementation of 2D FIR FiltersIntegration-The VLSI Journal, Volume 38, Issue 4 , pp 597-613, April 2005.

A. Özpınar and A. Yurdakul, "Configurable Design and Implementation of the Rijndael Algorithm-AES" Proceedings of WIP-Euromicro2003, Antalya, Turkey, 2003.

A. Yurdakul and G. Dündar, "A Fast and Efficient Algorithm for the Multiplierless Realization of Linear DSP Transforms," IEE-Proceedings-Circuits Devices, and Systems, vol 149, pp 205-211, 2002.

A. Yurdakul, "An Efficient Algorithm for the Multiplierless Realization of 2-D Linear Transforms," Proceedings of DSP’02, Atlanta, USA, 2002.

J. O. Coleman and A. Yurdakul, “Fractions in the Canonical-Signed-Digit Number System,” Proceedings of CISS’01, Baltimore, Maryland, USA, 2001.

A. Yurdakul, “A Synthesis Tool for the Multiplierless Realization of FIR-Based Multirate DSP SystemsProceedings of ISCAS’00, pp. (IV-69)-(IV-72), Geneva, Switzerland, 2000.

A. Yurdakul and G. Dündar, "Multiplierless Realization of Linear DSP Transforms by Using Common Two-Term Expressions," Kluwer Journal of VLSI Signal Processing, vol 22, pp 163-172, 1999.

A. Yurdakul and G. Dündar, "Statistical Methods for the Estimation of Quantization Effects in FIR-Based Multirate Systems," IEEE Transactions on Signal Processing, vol 47, pp 1749-1753, 1999.

A. Yurdakul and G. Dündar, "A New Hybrid Algorithm for Over-the-Cells Routing", Proceedings of MELECON'96, vol. 3, pp. 480-483, Bari, Italy, 1996.

Publications in Turkish:

L. Altın, M. Bayraker, M. Vatansever ve A. Yurdakul, “Yüksek Seviye Bireşim Aracıyla İki Boyutlu Poisson Denkleminin Hızlı Çözümü,” 5. Ulusal Yüksek Başarımlı Hesaplama Konferansı (BAŞARIM’17), 14-15 Eylül 2017, İstanbul

E. Çulha, G. A. Malazgirt, F. Başkaya, A. Şen, A. Yurdakul, “Sayısal İşaret İşleyen Sistemler İçin Yüksek Seviye Doğrulanabilir Veriyolu Üretimi”,  Sinyal İşleme ve İletişim Uygulamaları Kurultayı (SİU’12), 18-20 Nisan 2012, Fethiye, Muğla

S. Bayar ve A. Yurdakul, "Gömülü Çoklu İşlemcili Sistemlerde Yeniden Betimlenebilir Haberleşme Protokolleri, " ppt, Gömülü Sistemler ve Uygulamaları Sempozyumu (GÖMSİS’10), 4-5 Kasım 2010, İstanbul

M. Tükel ve A. Yurdakul, "Çok Kipli Ayrık Hücresel Sinir Ağı Modeli, " ppt, Gömülü Sistemler ve Uygulamaları Sempozyumu (GÖMSİS’10), 4-5 Kasım 2010, İstanbul

M. A. Güncan, A. Y. Kahveci, M. Erkoç ve A. Yurdakul, "Radyo Frekansıyla Konteyner Takip Sistemi, " Gömülü Sistemler ve Uygulamaları Sempozyumu (GÖMSİS’10), 4-5 Kasım 2010, İstanbul

A. Usta ve A. Yurdakul, "Telsiz Duyarga Ağları için Şifreleme ve Hata Tespiti İşlemlerinin Düşük Güç Tüketimiyle Gerçeklenmesi ve Ortak Analizi, " Gömülü Sistemler ve Uygulamaları Sempozyumu (GÖMSİS’10), 4-5 Kasım 2010, İstanbul

D. Fennibay, A. Yurdakul ve A. Sen, “SystemC ile Döngü İçinde Donanım,” Dördüncü Ulusal Yazılım Mühendisliği Sempozyumu (UYMS’09), 8-10 Ekim 2009, İstanbul.

G. K. Birkeland ve A. Yurdakul, “APKD’lerde Düşük Güç Harcayan SDY Süzgeç Tasarımı,” Sinyal İşleme ve İletişim Uygulamaları Kurultayı (SİU’05), Kayseri, 2005.

M. Aktan ve A. Yurdakul, "Seviye Dönüştürücüsüz Çoklu Besleme Gerilimi Ölçekleme Yöntemiyle Düşük Güç Harcayan Sayısal İşaret İşleme Bloklarının Tasarlanması," Sinyal İşleme ve İletişim Uygulamaları Kurultayı (SİU’03), 254-256, İstanbul, 2003.

A. Yurdakul, "İki Boyutlu Sonlu Dürtü Yanıtlı Süzgeçlerin Çarpıcısız Gerçeklenmesi için Matematiksel Model Geliştirimi," Sinyal İşleme ve İletişim Uygulamaları Kurultayı (SİU’03), 265-268, İstanbul, 2003.

A. Yurdakul, "İki Boyutlu Dönüşümlerin Çarpıcısız Gerçeklenmesi," Sinyal İşleme ve İletişim Uygulamaları Kurultayı (SİU’02), cilt 2, 887-892, Pamukkale, 2002.

A. Yurdakul, “Çoklu-evreli Sonlu Dürtü Yanıtlı Süzgeçlerin Çarpıcısız Uygulamaya Özgül Tümdevre Olarak Gerçeklenmesi,” Sinyal İşleme ve İletişim Uygulamaları Kurultayı (SİU’01), cilt 1, 376-381, Gazi Magossa, KKTC, 2001.

A. Yurdakul ve G. Dündar, "SDYS-Tabanlı Çoklu Hızlı Sistemlerin İkili Ortak Terim Kullanarak Çarpıcısız Gerçeklenmesi," Sinyal İşleme ve İletişim Uygulamaları Kurultayı (SİU'98), cilt 2, 525-530, Kızılcahamam, 1998.

A. Yurdakul ve G. Dündar, "Sonlu Dürtü Yanıtlı Süzgeçlerde Kelime Uzunluğunun Etkileri ve Çoklu Hızlı Sistemlerdeki Yansıması", Sinyal İşleme ve İletişim Uygulamaları Kurultayı (SİU'97), cilt 2, 593-598, Kuşadası, 1997.

Technical Reports:

G. K. Birkeland and A. Yurdakul, Comparing binary, CSD and CSD4 approaches on the aspect of power consumption in multiplierless FIR filters on FPGAs, Technical Report, FBE(COE-03/2005-23), Boğaziçi University, August 2005.

A. Yurdakul, Multiplierless implementation of 2-D FIR filters, Technical Report, FBE(COE-05/2004-23), Boğaziçi University, October 2004.

A. Yurdakul and G. Dündar, Multiplierless Realization of FIR-based Multirate Systems by Using Common Two-Term Expressions, Technical Report, FBE(EE-1/98-18), Boğaziçi University, September 1998.

A. Yurdakul and G. Dündar, Statistical Methods for the Estimation of Quantization Effects, Technical Report, FBE(EE-1/97-9), Boğaziçi University, September 1997.

Book:

A. Yurdakul, Digital Design Experiments with Labview(R) and Xilinx-ISE(R), 244 pages, ISBN: 975-518-219-5, Boğaziçi University Press, February 2004.

Text Box: Mail Address:
Bogazici University,
Computer Engineering Department,
Bebek 34342
Istanbul—TURKEY 
E-mail: 
yurdakul boun edu tr
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ETA29
Tel: 
+(90)(212)3597224
Fax: 
+(90)(212)2872461

CASLAB (Computer Architecture and Systems Laboratory)