Term Paper Presentation Schedule
November
22 , 2007 :
10:45-11:25 : Emre,Chasan M. – “Exploiting Unbalanced Thread
Scheduling for Energy & Performance
on a CMP of SMP”
11:30-12:10 : Ulutürk,Erdinç – “Compiler Directed Proactive Power
Management for Networks”
12:15-12:55 : Batur,Okan Z. – “A Survey of Techniques for Energy
Efficient On Chip Comm.”
November 29 , 2007 :
10:00-10:40 ; Aydoğan, Reyhan – “Niagara : A 32-way Multithread
SPARC Processor”
10:45-11:25 : Gerçek ,İsmail –
“Introduction to the
Cell Multi
Processor”
11:30-12:10 : Geleri, Fuat – “Compiling for Edge Architectures”
12:15-12:55 ; Korkmaz, Seyrani – “Low Swing On-Chip Signalling
Tech.:Effectiv. &Robustness”
December 6 , 2007 :
10:00-10:40 ; Aslan, Okay – “Advancing Multicore Technology into
the Tera-scale Era”
10:45-11:25 : Tımar, Yasemin – “ Dynamic Thread Assign. on
Heterogeneous Multiprocessor Arch.”
11:30-12:10 : Kavaklıoğlu,Can – “Route Packets not Wires: On Chip
Interconn. Networks”
12:15-12:55 ; Kurşrnoğlu, Sedef – TBA
December 13 , 2007 :
10:00-10:40 ; Çoğal, Ömer – “Perform. Evaluation & Design
Trade-Offs for NoC Interconn. Arch.”
10:45-11:25 : Yiğitel, Aykut – “Network-On-Chip:An Architecture for
Billion Transistor Era”
11:30-12:10 : Çavdar, Derya – “Topology Adaptive NoC Design &
Implementation”
12:15-12:55 ; Yakaryılmaz,Abuzer – “Smart Memories: A Modular
Reconfigurable Architecture”
December 27 , 2007 :
10:00-10:40 ; Zeybekler,Mert – “Fair Cache Sharing in a CMP
Architecture”
10:45-11:25 : Yılmaz, Emre – “The GARP Architecture / C Compiler”
11:30-12:10 : Birhan,S.Okan – “Static Place. Dynamic Issue (SPDI)
Scheduling for EDGE Arch.”
12:15-12:55 ;
Kızkun,
Fatih - Communication Optimization & Code Generation for
Distributed Memory Machines