CmpE 511 Computer Architecture

Fall 2005-2006

Instructor : Prof. Dr. Oğuz Tosun, ETA307, Tel.:3596768, E-mail: tosuno@boun.edu.tr

Class Meetings : Thursday 10:00-13:00 , Room No: ETA Z306

Textbook : Hennessy, J.L., Patterson D.A., Computer Architecture :A Quantitative Approach , Morgan Kaufmann Pub., 2003, 3rd Ed.

Other Reading Materials :

· Wilkinson,B., Computer Architecture :Design and Performance, Prentice Hall, 1996,2nd Ed.

· Flynn,M.J.,Computer Architecture : Pipelined and Parallel Processor Design , Jones & Bartlett Pub.,1995.

Course Outline :

1. Fine Grain Parallelism (Chapters 3 & 4)

1.1 Instruction level parallelism (Chapters 3 & 4)

1.1.1 Pipelined processors “MISD” (Chapter 3, Appendix A)

1.1.2 Superscaler processors (Chapter 3)

1.1.3 VLIW processors (Chapter 4)

1.2 Data Parallel Architectures (SIMD)

1.2.1 Array processors

1.2.2 Vector processors (Chapter 4,Appendix G)

2. Course Grain Parallelism “MIMD” (Chapters 6 & 8)

2.1 Shared Memory Multiprocessors “Tightly Coupled MIMD” (Chapter 6)

2.1.1 Uniform Memory Access “UMA” Architecture

· SMP Architecture

2.1.2 Non Uniform Memory Access “NUMA” Architecture

(Distributed Shared Memory Architecture)

· NonCache(NC)-NUMA Architecture

· Cache Coherent(CC)-NUMA Architecture

· Cache Only Memory Access “COMA” Architecture

2.2 Message Passing Multiprocessors “Loosely Coupled MIMD” (Chapters 6&8)

2.2.1 No Remoteaccess Memory Architecture “NORMA”

· Massively Parallel Architecture (Chapter 6)

· Workstation Clusters (Chapter 8)

3. Interconnection Networks for Parallel Systems (Chapter 8)
4. Reduced Instruction Set (RISC) Architecture (Appendix C)

Exams and grading :

EXAM	DATE	WEIGHT (%)
Midterm # 1	November 17,Thursday	30
Midterm # 2 (Term Project)	Presentations to be scheduled	30
Final	As scheduled by Registrar	40