|
|
NEW ANNOUNCEMENTS:
OLD ANNOUNCEMENTS:
- For final, you can bring an A4 size hand-written cheat-sheet. Your name should be written on the sheet. Photocopy is not allowed. You can write whatever you want on cheat-sheet and you can use both sides of the paper.
- You can see your second midterm papers on 5th and 7th of June at the office hours of course assistants.
- Second midterm grades are announced.
- Term project is announced. This project is not a group project. You have to write your own vhdl code in a single file. During the demo which is on 2nd of June, you will only demonsrate your project. No debugging, no excuses. You should bring your vhdl code as soft copy and hard copy, and the drawing of your design. Registration date for the time-slots for demos will be announced.
- Preliminary work for the tenth lab is announced.
- Just for this week, Friday section will start at 10:00.
- 2nd midterm will be held on class-hour at the class-room.
- For midterm, you can bring an A4 size hand-written cheat-sheet. Your name should be written on the sheet. Photocopy is not allowed. You can write whatever you want on cheat-sheet and you can use both sides of the paper.
- 2nd midterm will be held on 15th of May.
- Preliminary work for the ninth lab is announced.
- There is a possibility of postponing second midterm to 22nd of May. The final date will be announced after the end of objection period for this postponement. Objection period ends at 13:00 of May 12th. If noone objects to the postponement, midterm will be held on 22nd of May. A single objection is enough to make midterm on its original date, 15th of May.
- You can see your midterm papers on 10th and 15th of May at the office hours of course assistants.
- As a hint, study flip-flop circuits and read "Appendix E" of your lab book.
- This week, we have labs as usual. But you will have lab work instead of preliminary work.
- Midterm grades are announced.
- Since the seventh lab has some difficulties on the 4th version of Xilinx, we will perform the lab in two subsections. Following groups will start at 16:15.
- Abdulkerim Duran - Mehmet Salih Gök
- Ramazan Arikan - Cüneyd Murad Özsert
- Erman Dogan - Münir Siracettin Geden
- Ufuk Alan - Ahmet Olguner
- There will be a PS at HKA-202 on this Thursday between 16:00 and 17:00.
- In 7th lab, you are going to use FPGAs.
- This document is about LUTs.
- Preliminary work for the seventh lab is announced.
- Just for this week due to TK222 midterm, Friday section will start at 14:30. But again you may come at 15:00 as usual. It is up to you.
- For the sixth lab, the groups with old breadboards, which has only 8 bits total, will get the input A, B and for Monday group also C as follows. Prepare an input/output area as in the picture. You will get 3 bits of A from computer and give output (5 bit) to computer. We will set B and C via Vcc and ground.
- This file contains VHDL code for 4bit adder (74-83, 74-283).
- Preliminary work for the sixth lab is announced.
- This zip file contains VHDL codes for MUX and a "how-to" pdf.
- One of your midterm questions will be related with the fifth lab.
- Preliminary work for the fifth lab is announced.
- Your first midterm will be on April 10th Monday between 11:00 and 13:00.
- For midterm, you can bring an A4 size hand-written cheat-sheet. Your name should be written on the sheet. Photocopy is not allowed. You can write whatever you want on cheat-sheet and you can use both sides of the paper.
- Study questions are available for midterm. "Digital design essentials" of Richard S. Sandige is at library reserve. From this book, section 1.8 (completely), section 2.6 (completely) and section 3.9 (after 16th question) is related with your midterm.
- There will be a PS at KPARK-01 on this Friday between 14:00 and 15:00.
- For the forth lab, you are not going to implement the circuit on breadboards.
- Documents about minimization techniques and some examples, will be available for photocopying at Seçkin Copy after Friday 10 AM.
- Preliminary work for the fourth lab is announced.
- Preliminary work for the third lab is announced.
- Groups which want to change lab section, can do so if they find another group to change places with.
- Preliminary work for the second lab is announced.
- From now on, Wednesday lab section will start fifteen minutes late than usual.
- This is a guide for Xilinx software. Each group should have one during the first week. Those groups, which do not bring one, will be penalized. (This is the zipped version.)
- Wednesday and Friday sections are announced.
- Preliminary work for the first lab is announced.
- Wednesday and Friday sections will be announced after the situation of an exceptional student is clarified.
- Lab regulations are announced.
- Monday lab section groups are announced.
- Lab regulations for this term and preliminary work for the first lab (13-17 March) will be announced Friday night.
- Labs will be at KB 223.
- Lab registrations will be repeated on March 10th Friday at HKC 204 (11:00 - 12:00) and Hisar Campus PC-LAB (12:00-13:00).
- Labs will start this Monday. You can miss at most one lab and no make-ups will be available. At the end, you will get a "zero" for that lab. Missing more than one lab makes you fail the course.
- There are things, belonging to the EE department, in the middle of the lab. Touching these things may make you fail the course
- Lab section on Thursday is moved to F789. For detailed information check your mail.
- Lab registration will take place at HKC 204 on Friday (03/03/2006) between 14:00 and 17:00.
- Class on W6 is moved from KPARK1 to HKD201.
- Lab registration will take place on Friday (03/03/2006) between 14:00 and 17:00. Place will be announced when it is set.
- M. Fatih Akbulut, Marsan Ari, Ilker Basibüyük, Hakan Çelik, M. Ilker Helvaci, Talha Öz, Yusuf Özer, Dimitry Pia, Baris Yurduseven do not have to repeat the lab work.
- Lab registration is postponed. New registration time will be announced later. As a reminder, you should register in groups of two.
- The current lab schedule is
- Monday 7-8-9
- Wednesday 7-8-9
- Thursday 2-3-4
- Registered students are added to the
cmpe240 mailing list.
|
|